Catalog > DMA32 - AHB DMA Controller
This DMA32 implements a configurable, single-channel, direct memory access controller for the 32-bit wide AHB bus. It conforms to the Advanced Micro controller Bus Architecture 2.0 (AMBA) specification.
The DMA32 controller contains useful features such as incrementing and non-incrementing addressing, linked list operation, and interrupt control to alert the processor to the DMA’s status.
Non-incrementing addressing is useful for transferring data to and from peripherals with FIFOs or a single data port. Incrementing addressing is useful for transferring data to and from memories or peripherals containing memory. Linked list support is useful for non-contiguous memory transfer operations.
The DMA32 controller acts as a bus master device that controls data block transfers from a source memory or peripheral to a destination memory or peripheral. The controller can implement multiple DMA channels simply by instantiating more than one controller on the AMBA AHB bus. Arbitration is handled by the AHB system bus.
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Encryption Support: Altera • Cadence
Maturity Level: Silicon Proven
Additional Deliverables: Documentation • Test Bench • Test Cases