Catalog > BA21 - 32-bit Low-Power Deeply Embedded Processor
The BA21 a 32-bit low-power processor that delivers better performance than most processors of its size. Designed for deeply-embedded systems or as an auxiliary processor in larger systems, it is an especially effective choice for wireless communication, analog peripherals management, or other mixed-signal functions in energy-and cost-sensitive applications.
This royalty-free 32-bit processor core is binary-compatible with other members of the silicon-proven BA2x processor family. Its BA2 instruction set is relatively simple and extremely compact, offering system area and energy savings benefits. Programing is facilitated with the included C/C++ tool chain, Eclipse IDE, architectural simulator, and ported C libraries, RTOSs, and OSs.
The two-stage pipelined architecture minimizes standby/idle power and run-time energy consumption. The small silicon footprint of the CPU, and the smaller code-memory requirement (resulting from extreme code density of the BA2 instruction set), are critical for minimizing leakage currents during idle or standby modes and reducing dynamic power consumption. Furthermore, the processor allows for sophisticated power management, enabling dynamic clock-gating or power-shut-off of unused units, and software or hardware controller dynamic frequency scaling of the bus and the CPU.
Delivering more processing power per MHz than most processors in its class, the BA21 can be configured to operate at low frequencies to further save power, or to meet the most demanding embedded processing requirements, or any optimum combination of both. Its processing capabilities can be enhanced further with a hardware multiplier/divider unit and an IEEE 754 compliant floating-point unit. Timely responses to interrupts are facilitated by a vectored interrupt controller, and an optional memory protection unit can be used to protect application code and/or data from corruption. The core supports reach debug capabilities including trace.
The system interface uses two AMBA® AXI4 buses, one for data and one for instructions, both of configurable data width. Two tightly-coupled quick memory (QMEM) buses allow fast access for time-critical code and data, and can be used for inter-core communication in a multi-core architecture.
Additional microcontroller peripherals may be ordered for pre-integration and delivery with the core, individually or in a complete platform. IP Integration Services are also available to help integrate any BA2x processor configuration with memory controllers, image compression, or other CAST IP cores.
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Format: Netlist • RTL • Source
Encryption Support: Altera • Cadence
Maturity Level: Silicon Proven
Additional Deliverables: Application Notes • Documentation • Software • Test Bench • Test Cases